This invention relates to a multilevel modulator and to a multilevel demodulator for use as a counterpart of the multilevel modulator.
In a multilevel modulator of the type described, a pair of quadrature-phase carrier signals are amplitude modulated by an input signal into a quadrature amplitude modulated signal. When the input signal is an n-bit binary signal where n is a predetermined number, the quadrature amplitude modulated signal has 2.sup.n output signal points specified on a phase plane which has an origin and real and imaginary axes orthogonally crossing at the origin. The output signal points are arranged in a main region, for example, a square region, which has a center point at the origin. The output signal points are in one-to-one correspondence to 2.sup.n signal values represented by the n-bit binary signal. Such a multilevel modulator is exemplified in U.S. patent application Ser. No. 779,217 filed Sept. 23, 1985 by Junichi Uchibori et al. for assignment to NEC Corporation and in U.S. patent application Ser. No. 794,662 filed Nov. 4, 1985 by Yasuharu Yoshida, the instant applicant, for assignment to NEC Corporation. The multilevel modulator is called a 2.sup.n -ary quadrature amplitude modulator. This means that the number of the output signal points are as many as 2.sup.n, for example, to sixteen, sixty-four, two-hundred and fifty-six, and so on.
In the meanwhile, a recent requirement is directed to transmission of a plurality of input data sequences which have different bit rates from each other. For example, the input data sequences may comprise a main data sequence of a first bit rate and a subdata sequence of a second bit rate lower than the first bit rate. But, the conventional multilevel modulator can not be used to transmit the plurality of input data sequences in the form of the multilevel quadrature amplitude modulated signal. Therefore, the subdata signal sequence must be transmitted through another transmission line different from a transmission line for the main data sequence.